? semiconductor components industries, llc, 2002 april, 2002 rev. 5 1 publication order number: mc10e457/d mc10e457, mc100e457 5vecl triple differential 2:1 multiplexer the mc10e457/100e457 is a 3-bit differential 2:1 multiplexer. the fully differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. the higher frequency outputs provide the device with a > 1.0 ghz bandwidth to meet the needs of the most demanding system clock. both, separate selects and a common select, are provided to make the device well suited for both data path and random logic applications. the differential inputs have internal clamp structures which will force the q output of a gate in an open input condition to go to a low state. thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. note that the input clamp will take affect only if both inputs fall 2.5 v below v cc . the 100 series contains temperature compensation. multiple v bb pins are provided to ease ac coupling input signals. the v bb pins, internally generated voltage supply pins, are available to this device only. for single-ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. ? differential d and q; v bb available ? 700 ps max. propagation delay ? high frequency outputs ? separate and common select ? pecl mode operating range: v cc = 4.2 v to 5.7 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = 4.2 v to 5.7 v ? internal input pulldown resistors ? esd protection: > 2 kv hbm, > 200 v mm ? meets or exceeds jedec spec eia/jesd78 ic latchup test ? moisture sensitivity level 1 for additional information, see application note and8003/d ? flammability rating: ul94 code v0 @ 1/8 , oxygen index 28 to 34 ? transistor count = 218 devices device package shipping ordering information mc10e457fn plcc28 37 units/rail mc10e457fnr2 plcc28 500 units/reel mc100e457fn plcc28 37 units/rail mc100e457fnr2 plcc28 500 units/reel marking diagrams a = assembly location wl = wafer lot yy = year ww = work week plcc28 fn suffix case 776 mc10e457fn awlyyww mc100e457fn awlyyww 128 128 http://onsemi.com
mc10e457, mc100e457 http://onsemi.com 2 pin description pin function dn [ 0:2 ] ; dn [ 0:2 ] ecl differential data inputs sel ecl individual select input comsel ecl common select input q [ 0:2 ] , q [ 0:2 ] ecl differential data outputs v bb reference voltage output v cc, v cco positive supply v ee negative supply maximum ratings (note 1) symbol parameter condition 1 condition 2 rating units v cc pecl mode power supply v ee = 0 v 8 v v ee necl mode power supply v cc = 0 v 8 v v i pecl mode input voltage v ee = 0 v v i v cc 6 v v i pecl mode in ut voltage necl mode input voltage v ee 0 v v cc = 0 v v i ? ?? ? ? v ee 6 6 v v i out output current continuous surge 50 100 ma ma i bb v bb sink/source 0.5 ma ta operating temperature range 0 to +85 c t stg storage temperature range 65 to +150 c q ja thermal resistance (junctiontoambient) 0 lfpm 500 lfpm 28 plcc 28 plcc 63.5 43.5 c/w c/w q jc thermal resistance (junctiontocase) std bd 28 plcc 22 to 26 c/w v ee pecl operating range necl operating range 4.2 to 5.7 5.7 to 4.2 v v t sol wave solder < 2 to 3 sec @ 248 c 265 c 1. maximum ratings are those values beyond which device damage may occur. sel0 d 0 a v bb d 0 b d 0 b comsel v cco sel1 d 1 a d 1 a v ee v bb d 1 b d 1 b 26 27 28 2 3 4 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 567 8910 sel2 d 2 ad 2 a v bb d 2 b d 2 b q 2 q 2 v cc q 1 q 1 q 0 q 0 d 0 a 1 pinout: 28-lead plcc (top view) * all v cc and v cco pins are tied together on the die. figure 1. pinout assignment warning: all v cc , v cco , and v ee pins must be externally connected to power supply to guarantee proper operation. d 0 a d 0 a d 0 b d 0 b sel0 d 1 a d 1 a d 1 b d 1 b sel1 d 2 a d 2 a d 2 b d 2 b sel2 comsel v bb q 0 q 0 q 1 q 1 q 2 q 2 h l 2:1 mux h l 2:1 mux h l 2:1 mux figure 2. logic diagram sel data function table h l a b
mc10e457, mc100e457 http://onsemi.com 3 10e series pecl dc characteristics v ccx = 5.0 v; v ee = 0.0 v (note 2) 40 c 0 c 25 c 85 c symbol characteristic min typ max min typ max min typ max min typ max unit i ee power supply current 92 110 92 110 92 110 92 110 ma v oh output high voltage (note 3) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mv v ol output low voltage (note 3) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mv v ih input high voltage (singleended) 3830 3995 4160 3870 4030 4190 3940 4110 4280 mv v il input low voltage (singleended) 3050 3285 3520 3050 3285 3520 3050 3302 3555 mv v bb output voltage reference 3.57 3.7 3.62 3.73 3.65 3.75 3.69 3.81 v v ihcmr input high voltage common mode range (differential) (note 4) 2.7 5.0 2.7 5.0 2.7 5.0 v i ih input high current 150 150 150 150 m a i il input low current 0.5 0.3 0.5 0.25 0.3 0.2 m a note: devices are designed to meet the dc specifications shown in the above table, after thermal equilibrium has been establishe d. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 2. input and output parameters vary 1:1 with v cc . v ee can vary +0.46 v / 0.06 v. 3. outputs are terminated through a 50 w resistor to v cc 2 volts. 4. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . 10e series necl dc characteristics v ccx = 0.0 v; v ee = 5.0 v (note 5) 40 c 0 c 25 c 85 c symbol characteristic min typ max min typ max min typ max min typ max unit i ee power supply current 92 110 92 110 92 110 92 110 ma v oh output high voltage (note 6) 1020 930 840 980 895 810 910 815 720 mv v ol output low voltage (note 6) 1950 1790 1630 1950 1790 1630 1950 1773 1595 mv v ih input high voltage (singleended) 1170 1005 840 1130 970 810 1060 890 720 mv v il input low voltage (singleended) 1950 1715 1480 1950 1715 1480 1950 1698 1445 mv v bb output voltage reference 1.43 1.3 1.38 1.27 1.35 1.25 1.31 1.19 v v ihcmr input high voltage common mode range (differential) (note 7) 2.3 0.0 2.3 0.0 2.3 0.0 v i ih input high current 150 150 150 150 m a i il input low current 0.5 0.3 0.5 0.065 0.3 0.2 m a note: devices are designed to meet the dc specifications shown in the above table, after thermal equilibrium has been establishe d. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 5. input and output parameters vary 1:1 with v cc . v ee can vary +0.46 v / 0.06 v. 6. outputs are terminated through a 50 w resistor to v cc 2 volts. 7. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc .
mc10e457, mc100e457 http://onsemi.com 4 100e series pecl dc characteristics v ccx = 5.0 v; v ee = 0.0 v (note 8) 40 c 0 c 25 c 85 c symbol characteristic min typ max min typ max min typ max min typ max unit i ee power supply current 92 110 92 110 92 110 106 127 ma v oh output high voltage (note 9) 3975 4050 4120 3975 4050 4120 3975 4050 4120 mv v ol output low voltage (note 9) 3190 3295 3380 3190 3255 3380 3190 3260 3380 mv v ih input high voltage (singleended) 3835 4050 4120 3835 4120 4120 3835 4120 4120 mv v il input low voltage (singleended) 3190 3300 3525 3190 3525 3525 3190 3525 3525 mv v bb output voltage reference 3.62 3.74 3.62 3.74 3.62 3.74 3.62 3.74 v v ihcmr input high voltage common mode range (differential) (note 10) 2.7 5.0 2.7 5.0 2.7 5.0 v i ih input high current 150 150 150 150 m a i il input low current 0.5 0.3 0.5 0.25 0.5 0.2 m a note: devices are designed to meet the dc specifications shown in the above table, after thermal equilibrium has been establishe d. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 8. input and output parameters vary 1:1 with v cc . v ee can vary +0.46 v / 0.8 v. 9. outputs are terminated through a 50 w resistor to v cc 2 volts. 10. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . 100e series necl dc characteristics v ccx = 0.0 v; v ee = 5.0 v (note 11) 40 c 0 c 25 c 85 c symbol characteristic min typ max min typ max min typ max min typ max unit i ee power supply current 92 110 92 110 92 110 106 127 ma v oh output high voltage (note 12) 1025 950 880 1025 950 880 1025 950 880 mv v ol output low voltage (note 12) 1810 1705 1620 1810 1745 1620 1810 1740 1620 mv v ih input high voltage (singleended) 1165 950 880 1165 880 880 1165 880 880 mv v il input low voltage (singleended) 1810 1700 1475 1810 1475 1475 1810 1475 1475 mv v bb output voltage reference 1.38 1.26 1.38 1.26 1.38 1.26 1.38 1.26 v v ihcmr input high voltage common mode range (differential) (note 13) 2.3 0.0 2.3 0.0 2.3 0.0 v i ih input high current 150 150 150 150 m a i il input low current 0.5 0.3 0.5 0.25 0.5 0.2 m a note: devices are designed to meet the dc specifications shown in the above table, after thermal equilibrium has been establishe d. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 11. input and output parameters vary 1:1 with v cc . v ee can vary +0.46 v / 0.8 v. 12. outputs are terminated through a 50 w resistor to v cc 2 volts. 13. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc .
mc10e457, mc100e457 http://onsemi.com 5 ac characteristics v ccx = 5.0 v; v ee = 0.0 v or v ccx = 0.0 v; v ee = 5.0 v (note 14) 0 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum toggle frequency tbd tbd tbd ghz t plh t phl propagation delay to output d (differential) d (single-ended) sel comsel 325 275 300 325 475 475 500 525 700 750 775 800 375 325 350 375 475 475 500 525 650 700 725 750 ps t skew within-device skew (note 15) 40 40 ps t skew duty cycle skew (note 16) t plh t phl 10 10 ps t jitter cycletocycle jitter tbd tbd tbd ps v pp input voltage swing (differential) (note 17) 150 150 mv t r /t f rise/fall time 2080% 125 275 500 150 275 450 ps 14. 10 series: v ee can vary +0.46 v / 0.06 v. 100 series: v ee can vary +0.46 v / 0.8 v. 15. within-device skew is defined as identical transitions on similar paths through a device. 16. duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs t o the cross point of the outputs. 17. minimum input swing for which ac parameters are guaranteed.
mc10e457, mc100e457 http://onsemi.com 6 typical termination for output driver and device evaluation (see application note and8020 termination of ecl logic devices.) driver device receiver device qd 50 50 v tt q d v tt = v cc 2.0 v resource reference of application notes an1404 eclinps circuit performance at nonstandard v ih levels an1405 ecl clock distribution techniques an1406 designing with pecl (ecl at +5.0 v) an1503 eclinps i/o spice modeling kit an1504 metastability and the eclinps family an1568 interfacing between lvds and ecl an1596 eclinps lite translator elt family spice i/o model kit an1650 using wireor ties in eclinps designs an1672 the ecl translator guide and8001 odd number counters design and8002 marking and date codes and8020 termination of ecl logic devices
mc10e457, mc100e457 http://onsemi.com 7 package dimensions plcc28 fn suffix plastic plcc package case 77602 issue e n m l v w d d y brk 28 1 view s s l-m s 0.010 (0.250) n s t s l-m m 0.007 (0.180) n s t 0.004 (0.100) g1 g j c z r e a seating plane s l-m m 0.007 (0.180) n s t t b s l-m s 0.010 (0.250) n s t s l-m m 0.007 (0.180) n s t u s l-m m 0.007 (0.180) n s t z g1 x view dd s l-m m 0.007 (0.180) n s t k1 view s h k f s l-m m 0.007 (0.180) n s t notes: 1. datums -l-, -m-, and -n- determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum -t-, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). dim min max min max millimeters inches a 0.485 0.495 12.32 12.57 b 0.485 0.495 12.32 12.57 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.019 0.33 0.48 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 --- 0.51 --- k 0.025 --- 0.64 --- r 0.450 0.456 11.43 11.58 u 0.450 0.456 11.43 11.58 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y --- 0.020 --- 0.50 z 2 10 2 10 g1 0.410 0.430 10.42 10.92 k1 0.040 --- 1.02 ---
mc10e457, mc100e457 http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc10e457/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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